Most of the following conference papers appear in embedded systems, CAD/VLSI, and computer architecture conferences that have acceptance rates ranging from 15–25%. For each paper, a presentation is given.
| Journal | X. Chen, L. Yang, R. P. Dick, L. Shang, and H. Lekatsas, “C-Pack: A high-performance microprocessor cache compression algorithm,” in IEEE Trans. VLSI Systems, to appear. |
| Journal | L. Bai, L. Yang, and R. P. Dick, “Automated compile-time and run-time techniques to increase usable memory in MMU-less embedded systems,” in ACM Trans. Embedded Computing Systems, to appear. Notes: Compiler-assisted on-line data compression technique permits substantial increases in usable memory on MMU-less embedded systems, such as sensor network nodes. |
| Journal | L. Yang, R. P. Dick, H. Lekatsas, and S. Chakradhar, “High-performance operating system controlled on-line memory compression,” in ACM Trans. Embedded Computing Systems, to appear. Notes: New compression algorithm doubles usable embedded system memory without hardware or application changes and with negligible performance and power overhead. NEC uses this technology in their cellphones. |
| Journal | L. Yang, H. Lekatsas, R. P. Dick, and S. Chakradhar, “On-line memory compression for embedded systems,” in ACM Trans. Embedded Computing Systems, to appear. Notes: Operating system technique to double usable memory in embedded systems without changing applications, or hardware, and with little or no performance or power penalty. NEC uses this technology in their cellphones. |
| Journal | C. Zhu, Z. P. Gu, R. P. Dick, L. Shang, and R. Knobel, “Characterization of single-electron tunneling transistors for designing low-power embedded systems,” in IEEE Trans. VLSI Systems, to appear. Notes: First work to evaluate the architectural implications of using single-electron tunneling transistors for numerous embedded and general-purpose processors. |
| Conference | T. Chantem X. S. Hu, and R. P. Dick, “Online work maximization under a peak temperature constraint,” in Proc. Int. Symp. Low-Power Electronics & Design., Jul. 2009. |
| Conference | L. Zhang, L. Bai, R. P. Dick, L. Shang, and R. Joseph, “Process variation characterization of chip-level multiprocessors,” in Proc. Design Automation Conf., Jul. 2009. |
| Conference | S. Yazji, X. Chen, R. P. Dick, and P. Scheuermann, “Implicit user re-authentication for mobile devices,” in Proc. Int. Conf. on Ubiquitous Intelligence and Computing, Jul. 2009. |
| Conference | S. P. Tarzia, R. P. Dick, P. A. Dinda, and G. Memik, “Sonar-based measurement of user attention,” in Proc. USENIX Annual Tech. Conf., Jun. 2009. Poster paper. |
| Journal | Z. Hassan, N. Allec, L. Shang, R. P. Dick, V. Venkatraman, and R.-G. Yang, “Multiscale Thermal Analysis for Nanometer-Scale Integrated Circuits,” in IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems, Jun. 2009. |
| Conference | L. S. Bai, R. P. Dick, and P. A. Dinda, “Archetype-based design: sensor network programming for application experts, not just programming experts,” in Proc. Int. Symp. Information Processing in Sensor Networks, Apr. 2009. Notes: Proposes a sensor network application taxonomy for the purpose of designing focused, compact languages for application experts. New programming language for first archetype is compared with existing languages via user studies. |
| Conference | D. R. Bild, G. Bok, and R. P. Dick, “Minimization of NBTI performance degradation using internal node control,” in Proc. Design, Automation & Test in Europe Conf., Apr. 2009. Notes: Combined use of input vector control and internal node control reduces NBTI-induced delay by 27% in sleep-mode functional units. |
| Conference | B. Lin, A. Mallik, P. A. Dinda, G. Memik, and R. P. Dick, “User- and process-driven dynamic voltage and frequency scaling,” in Proc. Int. Symp. Performance Analysis of Systems and Software, Apr. 2009. |
| Conference | Z. Li, J. Wu, L. Shang, R. P. Dick, and Y. Sun, “Latency criticality aware on-chip communication,” in Proc. Design, Automation & Test in Europe Conf., Apr. 2009. |
| Conference | H. Long, Y. Liu, X. Fan, R. P. Dick, and H. Yang, “Energy-efficient spatially-adaptive clustering and routing in wireless sensor networks,” in Proc. Design, Automation & Test in Europe Conf., Apr. 2009. |
| Conference | L. Zhang, R. P. Dick (and L. Shang &ndash see note), “Scheduled voltage scaling for increasing lifetime in the presence of NBTI,” in Proc. Asia & South Pacific Design Automation Conf., Jan. 2009. Notes: Li Shang participated on this project but an error during submission left him off the author list. It was against conference policy to later add him to the list. |
| Conference | D. R. Bild, S. Misra, T. Chantem, P. Kumar, R. P. Dick, X. S. Hu, L. Shang, and A. Choudhary, “Temperature-aware test scheduling for multiprocessor systems-on-chip,” in Proc. Int. Conf. Computer-Aided Design, Nov. 2008. Notes: Multicore test scheduling algorithm that minimizes test application time under a constraint on peak integrated circuit temperature. 10.8% improvement in test application time compared to past work. |
| Conference | N. Allec, Z. Hassan, L. Shang, R. P. Dick, and R. Yang, “ThermalScope: multi-scale thermal analysis for nanometer-scale integrated circuits,” in Proc. Int. Conf. Computer-Aided Design, Nov. 2008. Notes: Nominated for best paper award. Unified Boltzmann transport and Fourier heat flow thermal model capable of nanoscale accuracy and efficient enough to handle an entire integrated circuit. conference. |
| Conference | A. Shye, Y. Pan, B. Scholbrock, J. S. Miller, G. Memik, P. Dinda, and R. P. Dick, “Power to the people: leveraging human physiological traits to control microprocessor frequency,” in Proc. Int. Symp. Microarchitecture, Nov. 2008. Notes: Nominated for best-paper award (8/210). |
| Conference | N. Liveris, H. Zhou, R. P. Dick, and P. Banerjee, “State space abstraction for parameterized self-stabilizing embedded systems,” in Proc. Int. Conf. Embedded Software, Oct. 2008. Notes: This work seeks to improve the reliability of hardware/software systems. It is an abstraction technique that enables automated verification of self-stabilizing systems with an arbitrary number of processes. |
| Conference | K. Meng, R. Joseph, L. Shang, and R. P. Dick, “Multi-optimization power management for chip multiprocessors,” in Proc. Int. Conf. Parallel Architecture and Compilation Techniques, Oct. 2008. |
| Journal | L. Yang, R. P. Dick, H. Lekatsas, and S. Chakradhar, “RAM for free,” IEEE Spectrum, Aug. 2008. Notes: Accessible article explaining a RAM compression technique that doubles usable memory. NEC uses this technology in their cellphones. |
| Journal | C. Zhu, Z. P. Gu, L. Shang, R. P. Dick, and R. Joseph, “Three-dimensional chip-multiprocessor run-time thermal management,” IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems, vol. 27, no. 8, Aug. 2008. Notes: New operating system dynamic thermal management technique permits 30% improvement in throughput compared to best existing (local distributed) technique. |
| Conference | A. Shye, B. Ozisikyilmaz, A. Mallik, G. Memik, P. A. Dinda, R. P. Dick, and A. N. Choudhary, “Learning and leveraging the relationship between architecture-level measurements and individual user satisfaction,” in Proc. Int. Symp. Computer Architecture, Jun. 2008. Notes: Neural network models based on processor performance counter observations permit prediction of user satisfaction with power control policies, permitting 25% reduction in processor power. |
| Journal | Z. Li, C. Zhu, L. Shang, R. P. Dick, and Y. Sun, “Transaction-aware network-on-chip resource reservation,” IEEE Computer Architecture Letters, Jun. 2008. Notes: Accelerating common-case events in high-level network-on-chip communication protocol improves data access latency by 28%. |
| Journal | Z. P. Gu, C. Zhu, L. Shang, and R. P. Dick, “Application-specific MPSoC reliability optimization,” IEEE Trans. VLSI Systems, vol. 16, no. 5, May 2008. Notes: Temperature-aware reliability optimization techniques for use in multiprocessor system-on-chip synthesis. |
| Conference | X. Chen, R. P. Dick, and A. Choudhary, “Operating system controlled processor-memory bus encryption,” in Proc. Design, Automation, and Test in Europe Conf., Mar. 2008. Notes: Operating system technique encrypts all processor–memory bus data transfers of protected processes without changes to hardware or applications. |
| Conference | X. Chen, L. Yang, H. Lekatsas, R. P. Dick, and L. Shang, “Design and implementation of a high-performance microprocessor cache compression algorithm,” in Proc. Data Compression Conf., Mar. 2008. Notes: Efficient compression algorithm and hardware design appropriate for use in microprocessor cache compression. |
| Conference | L. Bai, H. Lekatsas, and R. P. Dick, “Adaptive filesystem compression for embedded systems,” in Proc. Design, Automation, and Test in Europe Conf., Mar. 2008. Notes: Technique to increase usable storage on embedded systems. Improves performance by 67% compared to currently-used technique: uniform compression. 24% acceptance rate for conference. |
| Conference | T. Chantem, R. P. Dick, and X. S. Hu, “Temperature-aware scheduling and assignment for hard real-time applications on MPSoCs,” in Proc. Design, Automation & Test in Europe Conf., Mar. 2008. Notes: Optimal formulation and efficient heuristic for temperature-aware real-time multiprocessor system-on-chip scheduling problem. |
| Conference | A. Mallik, J. Cosgrove, R. P. Dick, G. Memik, and P. Dinda, “PICSEL: Measuring User-Perceived Performance to Control Dynamic Frequency Scaling,” in Proc. Int. Conf. Architectural Support for Programming Languages and Operating Systems, Mar. 2008. Notes: Video output based estimation of user-required performance level reduces laptop power consumption by 12%. |
| Conference | A. Shye, L. Yang, X. Chen and B. Ozisikylmaz, A. Mallik, B. Lin, G. Memik, R. P. Dick, and P. Dinda, “Empathic Computer Architectures and Systems,” in Proc. Int. Conf. Architectural Support for Programming Languages and Operating Systems, Mar. 2008. Notes: Wild and crazy ideas track. |
| Conference | P. Zhou, Y. Ma, Z. Li, R. P. Dick, L. Shang, H. Zhou, X. Hong, and Q. Zhou, “3D-STAF: Scalable Temperature and Leakage Aware Floorplanning for Three-Dimensional Integrated Circuits,” in Proc. Int. Conf. Computer-Aided Design, Nov. 2007. Notes: Temperature-aware floorplanning and placement for three-dimensional stacked-die integrated circuits. |
| Conference | S. Kim, R. P. Dick, and R. Joseph, “Power Deregulation: Eliminating Off-Chip Voltage Regulation Circuitry From Embedded Systems,” in Proc. Int. Conf. Hardware/Software Codesign and System Synthesis, pp. 105–110, Oct. 2007. Notes: Technique to eliminate power regulation hardware from embedded chip multiprocessors. |
| Journal | Z. P. Gu, J. Wang, R. P. Dick, and H. Zhou, “Unified Incremental Physical-Level and High-Level Synthesis,” in IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, Sep. 2007. Notes: Rapid, high-quality floorplanning within behavioral synthesis, merging the behavioral and physical design levels and permitting interconnect power optimization for large designs. |
| Conference | C. Zhu, Z. P. Gu, R. P. Dick, and L. Shang, “Reliable Multiprocessor System-On-Chip Synthesis,” in Proc. Int. Conf. Hardware/Software Codesign and System Synthesis, pp. 239–244, Oct. 2007. Notes: Temperature-aware reliability optimization techniques for use in multiprocessor system-on-chip synthesis. |
| Conference | C. Sun, L. Shang, R. P. Dick, “Three-Dimensional Multi-Processor System-on-Chip Thermal Optimization,” in Proc. Int. Conf. Hardware/Software Codesign and System Synthesis, pp. 117–122, Oct. 2007. Notes: Task assignment and voltage selection for three-dimensional stacked-wafer multiprocessor system-on-chip temperature and performance optimization. |
| Conference | C. Zhu, Z. P. Gu, L. Shang, R. P. Dick, and R. Knobel, “Towards an Ultra-Low-Power Architecture Using Single-Electron Tunneling Transistors,” in Proc. Design Automation Conf., pp. 312–317, Jun. 2007. Notes: One of 15 best paper award nominees out of 713 submitted papers. First work to evaluate the architectural implications of using single-electron tunneling transistors for numerous embedded and general-purpose processors. |
| Conference | P. Dinda, G. Memik, R. P. Dick, B. Lin, A. Mallik, A. Gupta, and S. Rossoff, “The User In Experimental Computer Systems Research,” in Proc. Wkshp. on Experimental Computer Science, Jun. 2007. Notes: Position paper indicating the importance of explicitly considering the user when designing computer systems. |
| Conference | B. Lin, A. Mallik, P. Dinda, G. Memik, and R. P. Dick, “Power Reduction Through Measurement and Modeling of Users and CPUs,” in Proc. Int. Conf. on Measurement and Modeling of Computer Systems, pp. 363–364, Jun. 2007. Poster paper. Notes: Directly monitoring user satisfaction to control processor dynamic voltage and frequency scaling policy permits 22% reduction in power consumption. |
| Journal | D. Brooks, R. P. Dick, R. Joseph, and L. Shang, “Power, Thermal, and Reliability Modeling in Nanometer-Scale Microprocessors,” in IEEE Micro, pp. 49–62, May 2007. Notes: Tutorial on modeling power consumption, and its attendant evils. |
| Conference | S. Jevtic, M. Kotowsky, R. P. Dick, P. A. Dinda, and C. Dowding, “Lucid Dreaming: Reliable Analog Event Detection for Energy-Constrained Applications,” in Proc. Int. Symp. Information Processing in Sensor Networks, pp. 350–359, Apr. 2007. Notes: Ultra-low-power event detection sensor interface technology permits 250× reduction in power consumption for event-driven applications such as structural integrity monitoring of buildings and bridges. |
| Journal | L. Shang, R. P. Dick, and Niraj K. Jha, “SLOPES: Hardware-Software Co-Synthesis of Low-Power Real-Time Distributed Embedded Systems with Dynamically Reconfigurable FPGAs,” in IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems, pp. 508–526, vol. 26, no. 3, Mar. 2007. Notes: First hardware-software co-synthesis algorithm to support partially and dynamically reconfigurable FPGAs. |
| Conference | Y. Liu, R. P. Dick, L. Shang, and H. Yang, “Accurate Temperature-Dependent Integrated Circuit Leakage Power Estimation is Easy,” in Proc. Conf. on Design, Automation, and Test in Europe, pp. 204–209, March 2007. Notes: First paper to clearly indicate thermal modeling conditions necessary and sufficient for accurate leakage estimation, resulting in reduced modeling complexity and orders of magnitude speedup compared with previous practice. |
| Conference | D. Zaretsky, G. Mittal, R. P. Dick, and P. Banerjee, “Balanced Scheduling and Operation Chaining in High-Level Synthesis for FPGA Designs,” in Proc. Int. Symp. Quality Electronic Design, pp. 595–601, March 2007. Notes: Techniques to reduce critical timing paths during FPGA synthesis. |
| Conference | Y. Liu, H. Yang, R. P. Dick, H. Wang, and L. Shang, “Thermal vs. Energy Optimization for DVFS-Enabled Processors in Embedded Systems,” in Proc. Int. Symp. Quality Electronic Design, pp. 204–209, March 2007. Notes: Evaluates trade-offs between temperature and power for DVFS in distributed systems. |
| Journal | Y. Yang, Z. P. Gu, R. P. Dick, and L. Shang, “ISAC: Integrated Space and Time Adaptive Chip-Package Thermal Analysis,” in IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems, Jan. 2007. Notes: New temporally and spatially adaptive dynamic and steady-state integrated circuit thermal analysis algorithms that are much faster than conventional approaches (e.g., 170×–476× for dynamic analysis) while maintaining accuracy. |
| Journal | A. Mallik, B. Lin, G. Memik, P. Dinda, and R. P. Dick, “User-Driven Frequency Scaling,” in IEEE Computer Architecture Letters, vol. 5, no. 2, Dec. 2006. Notes: Describes a new technique to reduce laptop power consumption by 22% by directly considering user satisfaction. |
| Conference | Y. Yang, C. Zhu, Z. P. Gu, L. Shang, and R. P. Dick, “Adaptive Multi-Domain Thermal Modeling and Analysis for Integrated Circuit Synthesis and Design,” in Proc. Int. Conf. Computer-Aided Design, pp. 575–582, Nov. 2006. Notes: Unified steady-state, time-domain, and frequency-domain adaptive thermal analysis system using adaptation to speed up analysis by orders of magnitude while preserving accuracy. |
| Conference | L. Bai, L. Yang, and R. P. Dick, “Automated Compile-Time and Run-Time Techniques to Increase Usable Memory in MMU-Less Embedded Systems,” in Proc. Int. Conf. Compilers, Architecture & Synthesis for Embedded Systems, pp. 125–135, Oct. 2006. Notes: Compiler-assisted on-line data compression technique permits substantial increases in usable memory on MMU-less embedded systems, such as sensor network nodes. |
| Conference | A.-H. Liu and R. P. Dick, “Automatic Run-Time Extraction of Communication Graphs From Multithreaded Applications,” in Proc. Int. Conf. Hardware/Software Codesign and System Synthesis, pp. 46–51, Oct. 2006. Notes: Simulator module dynamically determines communication patterns of arbitrary multi-threaded Linux applications for use in embedded system synthesis. |
| Journal | L. Shang and R. P. Dick, “Thermal Crisis: Challenges and Potential Solutions,” in IEEE Potentials, pp. 31–35, vol. 25, no. 5, Sep. 2006. Notes: Introduction to thermal problems in computing. |
| Conference | L. Yang, H. Lekatsas, and R. P. Dick, “High-Performance Operating System Controlled Memory Compression,” Proc. Design Automation Conf., pp. 701–704, Jul. 2006. Notes: New compression algorithm allows usable embedded system usable memory to be doubled without hardware or application changes and with negligible performance and power overhead. |
| Conference | Y. Yang, Z. P. Gu, C. Zhu, L. Shang, and R. P. Dick, “Adaptive Chip-Package Thermal Analysis for Synthesis and Design,” Proc. Conf. on Design, Automation, and Test in Europe, March 2006. Notes: New temporally and spatially adaptive dynamic and steady-state integrated circuit thermal analysis algorithms that are much faster than conventional approaches (e.g., 170×–476× for dynamic analysis) while maintaining accuracy. |
| Conference | Z. P. Gu, Y. Yang, J. Wang, R. P. Dick, and L. Shang, “TAPHS: Thermal-Aware Unified Physical-Level and High-Level Synthesis,” Proc. Asia & South Pacific Design Automation Conf., Jan. 2006. Notes: One of eight best paper award nominees out of 432 submitted papers. Efficient and high-quality unified thermal analysis, floorplanning, and high-level synthesis algorithm. |
| Conference | D. C. Zaretsky, G. Mittal, R. P. Dick, and P. Banerjee, “Dynamic Template Generation for Resource Sharing in Control and Data Flow Graphs,” Proc. Int. Conf. on VLSI Design, Jan. 2006. Notes: General backtracking resource sharing algorithm for FPGAs and potentially ASICs. |
| Conference | D. C. Zaretsky, G. Mittal, R. P. Dick, and P. Banerjee, “Generation of Control and Data Flow Graphs from Scheduled and Pipelined Assembly Code,” Proc. Wkshp. Languages and Compilers for Parallel Computing, Oct. 2005. Notes: Method of translating optimized binaries targeting DSPs exposing microarchitectural features to FPGAs. |
| Conference | L. Yang, R. P. Dick, H. Lekatsas, and S. Chakradhar, “CRAMES: Compressed RAM for Embedded Systems,” Proc. Int. Conf. Hardware/Software Codesign and System Synthesis, pp. 93–98, Sep. 2005. Notes: Operating system technique to double usable memory in embedded systems without changing applications, or hardware, and with little or no performance or power penalty. NEC uses this technology in their cellphones. |
| Conference | Z. P. Gu, J. Wang, R. P. Dick, and H. Zhou, “Incremental Exploration of the Combined Physical and Behavioral Design Space,” Proc. Design Automation Conf., pp. 208–213, Jun. 2005. Notes: Rapid, high-quality floorplanning within behavioral synthesis, merging the behavioral and physical design levels and permitting interconnect power optimization for large designs. |
| Conference | J. Conner, Y. Xie, M. Kandemir, R. P. Dick, and G. Link, “FD-HGAC: A Hybrid Heuristic/Genetic Algorithm Hardware/Software Co-Synthesis Framework With Fault Detection,” in Proc. Asia South Pacific Design Automation Conf., Jan. 2005. Notes: Uses task replication on temporarily-idle processors to detect faults. |
| Conference | Y. Zhang, R. P. Dick, and K. Chakrabarty, “Energy-Aware Deterministic Fault Tolerance in Distributed Real-Time Embedded Systems,” in Proc. Design Automation Conf., pp. 550–555, Jun. 2004. Notes: Synthesis of embedded systems using dynamic voltage scaling for power minimization and software checkpointing for reliability. |
| Journal | L. Shang, R. P. Dick, and N. K. Jha, “DESP: A Distributed Economics-Based Subcontracting Protocol for Computation Distribution in Power-Aware Mobile Ad-Hoc Networks,” in IEEE Trans. on Mobile Computing, pp. 33–45, Mar. 2004. Notes: Increases network lifespan and supports workload distribution using an auction-based protocol. auction-based protocol. |
| Journal | R. P. Dick and N. K. Jha, “COWLS: Hardware-Software Co-Synthesis of Distributed Wireless Low-Power Client-Server Systems,” in IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, pp. 2–16, vol. 23, no. 1, Jan. 2004. Notes: Concurrently optimizes communication and computation synthesis of wireless embedded systems. |
| Journal | R. P. Dick, G. Lakshminarayana, A. Raghunathan, and N. K. Jha, “Analysis of Power Dissipation in Real-Time Operating Systems,” in IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, pp. 615–627, vol. 22, no. 10, May 2003. Notes: Among the 20 most frequently downloaded articles in 2004 and 2005 for this top CAD journal. Simulation-based time and energy profiling of applications and operating systems. |
| Conference | L. Shang, R. P. Dick, and N. K. Jha, “An Economics-Based Power-Aware Protocol for Computation Distribution in Mobile Ad-Hoc Networks,” in Proc. IASTED Int. Conf. Parallel and Distributed Computing and Systems, Nov. 2002. Notes: Won best paper award in distributed computing. There were 140 papers published and five best paper categories. Increases network lifespan and supports workload distribution using an auction-based protocol. |
| Conference | R. P. Dick, G. Lakshminarayana, A. Raghunathan, and N. K. Jha, “Power Analysis of Embedded Operating Systems,” in Proc. Design Automation Conf., pp. 312–315, Jun. 2000. Notes: Simulation-based time and energy profiling of applications and operating systems. |
| Conference | R. P. Dick and N. K. Jha, “A Survey of Princeton Tools for Automatic Synthesis of Low-Power Embedded Systems,” in Proc. Power Sources Conf., pp. 494–497, Apr. 2000. |
| Conference | R. P. Dick and N. K. Jha, “COWLS: Hardware-Software Co-Synthesis of Distributed Wireless Low-Power Embedded Client-Server Systems,” in Proc. Int. Conf. on VLSI Design, pp. 114–120, Jan. 2000. Notes: Concurrently optimizes communication and computation synthesis of wireless embedded systems. |
| Conference | R. P. Dick and N. K. Jha, “MOCSYN: Multiobjective Core-Based Single-Chip System Synthesis,” in Proc. Design, Automation and Test in Europe, pp. 263–270, Mar. 1999. Notes: Selected by Design, Automation, and Test in Europe Conference as one of 30 most influential papers in the last ten years. The main idea of this work is to tightly integrate different levels of the multiprocessor system-on-chip design process, considering the impact of system-level changes on physical design. |
| Conference | R. P. Dick and N. K. Jha, “CORDS: Hardware-Software Co-Synthesis of Reconfigurable Real-Time Distributed Embedded Systems,” in Proc. Int. Conf. Computer-Aided Design, pp. 62–68, Nov. 1998. Notes: First hardware-software co-synthesis algorithm to support dynamically reconfigurable FPGAs. |
| Journal | R. P. Dick and N. K. Jha “MOGAC: A Multiobjective Genetic Algorithm for Hardware-Software Cosynthesis of Distributed Embedded Systems,” in IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, pp. 920–935, vol. 17, no. 10, Oct. 1998. Notes: Fast heterogeneous distributed system synthesis algorithm that meets or beats the design quality of previously reported results. |
| Conference | R. P. Dick, D.L. Rhodes, and W. Wolf, “TGFF: Task Graphs for Free,” in Proc. Int. Wkshp. Hardware/Software Codesign, pp. 97–101, Mar. 1998. Notes: Tool for use in scheduling and allocation research. |
| Conference | R. P. Dick and N. K. Jha, “MOGAC: A Multiobjective Genetic Algorithm for the Co-Synthesis of Hardware-Software Embedded Systems,” in Proc. Int. Conf. Computer Aided Design, pp. 522–529, Nov. 1997. Notes: Fast heterogeneous distributed system synthesis algorithm that meets or beats the design quality of previously reported results. |
R. P. Dick, Multiobjective Synthesis of Low-Power Real-Time Distributed Embedded Systems, Ph.D. Dissertation, Dept. of Electrical Engineering, Princeton University, Nov. 2002.
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