Abstract for OpenMP Compilation for Stacked-DRAM MPSoCs Architectures: NUMA Revisited

Emerging TSV-based 3D integration technologies have shown great promise to overcome scalability limitations in 2D designs by stacking multiple memory dies on top of a many-core die. However, technology advances must be complemented by an in-depth revision of multi-core architecture and programming models, with emphasis on main memory interfaces and efficient access to vertical "memory neighborhoods". In this talk, I will focus on efficient data mapping for SPMD parallel applications on an explicitly managed 3D-stacked memory hierarchy, which requires placement of data across multiple vertical memory stacks.

Biographical Sketch for Luca Benini

Luca Benini is Full Professor at the Department of Electrical Engineering and Computer Science (DEIS) of the University of Bologna. He also holds a visiting faculty position at the Ecole Polytechnique Federale de Lausanne (EPFL) and a Consulting Research Professor position at the Belgian Interuniversity MicroElectronics Centre (IMEC). He received a Ph.D. degree in electrical engineering from Stanford University in 1997.

Dr. Benini's research interests are in the design of system-on-chip multi-core platforms for embedded applications. He is also active in the area of energy-efficient smart sensors and sensor networks for biomedical and ambient intelligence applications.

He has published more than 450 papers in peer-reviewed international journals and conferences, four books and several book chapters. He has been general chair and program chair of the Design Automation and Test in Europe Conference. He has been a member of the technical program committee and organizing committee of several conferences, including the Design Automation Conference, International Symposium on Low Power Design, the Symposium on Hardware-Software Codesign. He is Associate Editor of several international journals, including the the IEEE Transactions on Computer Aided Design of Circuits and Systems and the ACM Transactions on Embedded Computing Systems. He is a Fellow of the IEEE and a member of the steering board of the ARTEMISIA European Association on Advanced Research & Technology for Embedded Intelligence and Systems.